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_a621.395 _bUYE |
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| 100 | _aUyemura, John P. | ||
| 245 | 0 | _aChip Design For Submicron Vlsi: Cmos Layout And Simulation | |
| 260 |
_aNew Delhi; _bCENGAGE LEARNING INDIA PRIVATE LIMITED _c2008 |
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| 300 | _a411p. | ||
| 365 | _b380 | ||
| 650 |
_a _a |
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_c12264 _d12264 |
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